| 专利名称 | Method for manufacturing dummy gate in gate-last process and dummy gate in gate-last process | 申请号 | US201214119862 | 专利类型 | US | 公开（公告）号 | US9202890(B2) | 公开（授权）日 | 2015.12.01 | 申请（专利权）人 | 中国科学院微电子研究所 | 发明（设计）人 | Li Chunlong;Li Junfeng;Yan Jiang;Zhao Chao | 主分类号 | H01L21/8249 | IPC主分类号 | H01L21/8249;H01L29/66;H01L21/28;H01L29/78;H01L29/423 | 专利有效期 | Method for manufacturing dummy gate in gate-last process and dummy gate in gate-last process 至Method for manufacturing dummy gate in gate-last process and dummy gate in gate-last process | 法律状态 | 说明书摘要 | A method for manufacturing a dummy gate in a gate-last process is provided. The method includes: providing a semiconductor substrate; growing a gate oxide layer on the semiconductor substrate; depositing bottom-layer amorphous silicon on the gate oxide layer; depositing an ONO structured hard mask on the bottom-layer amorphous silicon; depositing top-layer amorphous silicon on the ONO structured hard mask; depositing a hard mask layer on the top-layer amorphous silicon; forming photoresist lines having a width ranging from 32 nm to 45 nm on the hard mask layer; and etching the hard mask layer, the top-layer amorphous silicon, the ONO structured hard mask and the bottom-layer amorphous silicon in accordance with the photoresist lines, and removing the photoresist lines, the hard mask layer and the top-layer α-Si. Correspondingly, a dummy gate in a gate-last process is also provided. |
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2、平台验证，实名审核
3、合同监控，代办手续
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