| 专利名称 | Semiconductor device and manufacturing method thereof | 申请号 | US201113379120 | 专利类型 | US | 公开（公告）号 | US9012965(B2) | 公开（授权）日 | 2015.04.21 | 申请（专利权）人 | 中国科学院微电子研究所 | 发明（设计）人 | Luo Jun;Zhao Chao | 主分类号 | H01L29/76 | IPC主分类号 | H01L29/76;H01L29/47;H01L29/66;H01L29/78;H01L21/285;H01L21/265 | 专利有效期 | Semiconductor device and manufacturing method thereof 至Semiconductor device and manufacturing method thereof | 法律状态 | 说明书摘要 | The invention discloses a novel MOSFET device fabricated by a gate last process and its implementation method, the device comprising: a substrate; a gate stack structure located on a channel region in the substrate, on either side of which is eliminated the conventional isolation spacer; an epitaxially grown ultrathin metal silicide constituting a source/drain region. Wherein the device eliminates the high resistance region below the conventional isolation spacer; a dopant segregation region with imlanted ions is formed between the source/drain and the channel region, which decreases the Schottky barrier height between the metal silicide source/drain and the channel. At the same time, the epitaxially grown metal silicide can withstand a second high-temperature annealing used for improving the performance of a high-k gate dielectric material, which further improves the performance of the device. The MOSFET according to the invention reduces the parasitic resistance and capacitance greatly and thereby decreases the RC delay, thus improving the switching performance of the MOSFET device significantly. |
1、源头对接，价格透明
2、平台验证，实名审核
3、合同监控，代办手续
4、专员跟进，交易保障