| 专利名称 | Data readout circuit of phase change memory | 申请号 | US201113202963 | 专利类型 | US | 公开（公告）号 | US8947924(B2) | 公开（授权）日 | 2015.02.03 | 申请（专利权）人 | 中国科学院上海微系统与信息技术研究所 | 发明（设计）人 | Li Xi;Chen Houpeng;Song Zhitang;Cai Daolin | 主分类号 | G11C13/00 | IPC主分类号 | G11C13/00 | 专利有效期 | Data readout circuit of phase change memory 至Data readout circuit of phase change memory | 法律状态 | 说明书摘要 | A data readout circuit of phase change memory, relating to one or more phase change memory cells, wherein each phase change memory cell is connected to the control circuit by bit line and word line; said data readout circuit comprises: a clamp voltage generating circuit, used to generate a clamp voltage; a precharge circuit, used to fast charge bit line under the control of a clamp voltage; a clamped current generating circuit, used to generate a clamped current to keep bit line at clamped state under the control of a clamp voltage; a clamped current operation circuit, used to perform subtraction and multiplication on clamped current to increase the difference of clamped current between high resistance state and low resistance state; a sense amplifier circuit, used to compare the operated clamped current and the reference current and output the readout result. Compared with the prior art, the data readout circuit of phase change memory provided by the present invention can effectively enhance the data readout speed, decrease the misreading window between high resistance state and low resistance state, reduce the crosstalk of data readout, and improve the reliability of data readout. |
1、源头对接，价格透明
2、平台验证，实名审核
3、合同监控，代办手续
4、专员跟进，交易保障