Etch-back method for planarization at the position-near-interface of an interlayer dielectric

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专利名称 Etch-back method for planarization at the position-near-interface of an interlayer dielectric 申请号 US201113381005 专利类型 US 公开(公告)号 US8828881(B2) 公开(授权)日 2014.09.09 申请(专利权)人 中国科学院微电子研究所 发明(设计)人 Meng Lingkkuan;Yin Huaxiang 主分类号 H01L21/3065 IPC主分类号 H01L21/3065;H01L21/3105;H01L21/768;H01L29/78 专利有效期 Etch-back method for planarization at the position-near-interface of an interlayer dielectric 至Etch-back method for planarization at the position-near-interface of an interlayer dielectric 法律状态 说明书摘要 The invention discloses an etch-back method for planarization at the position-near-interface of an interlayer dielectric (ILD), comprising: depositing or growing a thick layer of SiO2 by the chemical vapor deposition or oxidation method on a surface of a wafer; spin-coating a layer of SOG and then performing a heat treatment to obtain a relatively uniform stack structure; perform an etch-back on the SOG using a plasma etching, and stopping when approaching the position-near-interface of SiO2; performing a plasma etch-back on the remaining SOG/SiO2 structure at the position-near-interface until achieving a desired thickness. Since a two-step etching at the position-near-interface is employed, an extremely good smooth surface of the ILD is obtained. That is, a planar and tidy surface of the ILD is obtained not only in the center region, but also even at the edge of the wafer.

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